1. Field of the Invention
The present invention relates to a semiconductor integrated circuit device suited to a voltage-controlled oscillator and the like configured to generate a plurality of oscillation outputs of a radio system and the like.
2. Description of Related Art
Conventionally, in a radio system of cellular phone and the like, a plurality of oscillation outputs of a local oscillator are generated by a frequency synthesizer in which a PLL (phase-locked loop) circuit or the like is used. In a PLL circuit or the like, a VCO (voltage-controlled oscillator) is used so that oscillation frequency can be easily controlled. For example, Japanese Patent Application Laid-Open Publication No. 5-300011 discloses a PLL circuit and a VCO which are each mounted on an IC chip.
That is, oscillation outputs are obtained by controlling the oscillation frequency of a VCO by use of a PLL circuit. An oscillation output of reference frequency (reference oscillation output) from a quartz-crystal oscillator and an output of the VCO are given to a phase comparator constituting the PLL circuit. The phase comparator finds a phase difference between the reference oscillation output and the oscillation output of the VCO and gives an output based on the phase difference as control voltage to the VCO via a low-pass filter. As a result of this, an oscillation output of reference frequency is obtained from the VCO. Furthermore, the output of the VCO is frequency-divided by a frequency divider and given to the phase comparator, whereby it is possible to obtain from the VCO an oscillation output having a frequency which is multiplied by the frequency dividing number of the reference frequency.
The VCO is composed of an LC resonance circuit provided with a varactor and an oscillation transistor for power supply. The LC oscillation circuit has an oscillation frequency based on the varactor and a fixed inductor, and an oscillation output having an oscillation frequency is obtained by the oscillation transistor. However, it is impossible to obtain an accurate oscillation frequency due to variations in elements constituting the VCO. Therefore, control voltage controlling the VCO is generated by the PLL circuit on the basis of a phase difference between the reference oscillation output and the VCO output and a capacitance value of the varactor is changed by this control voltage, whereby a fine adjustment is made so that the oscillation frequency of the VCO is made equal to a frequency corresponding to the reference frequency.
When a VCO is mounted on an IC chip, a differential configuration is often adopted for the oscillation transistor. That is, transistors in a differential pair are configured in such a manner that a gate and a drain are mutually connected. To ensure the oscillation of such a VCO, it is necessary for the oscillation transistor to have a gain sufficient for compensating for losses in the LC resonance circuit and have a sufficiently large gate width. Therefore, it is general practice to design the transistor pair to have a multi-finger configuration.
However, the transistor size of the transistor pair increases due to such multi-finger designs, and inevitably the length of an interconnect which connects the gate and drain of the transistor becomes long. For this reason, the gate-drain parasitic resistance increases, inducing deterioration in the characteristics of the VCO. Incidentally, it is conceivable that the parasitic resistance is reduced by increasing the interconnect width between the gate and the drain. In this case, however, the parasitic capacitance increases, with the result that the characteristics of the VCO deteriorate.